近年來，深圳龍人解密研究所依托深圳本地良好的技術(shù)研發(fā)環(huán)境，不僅在疑難解密領(lǐng)域傾注更多的研發(fā)資源，同時(shí)也在普通單片機(jī)低成本解密方案研究領(lǐng)域加大了投入，在技術(shù)攻關(guān)中成功研究出了EMC單片機(jī)、HOTEK單片機(jī)、CYPRESS單片機(jī)、MXIC單片機(jī)等單片機(jī)類型的超低成本解密方案，對(duì)其中的部分芯片幾乎可實(shí)現(xiàn)零成本解密，如EMC系列的EM78P153(E) 、EM78P156(E) 、EPM78P447、EM78P451/458/459 ，HOTEK系列的HT46RXX 、HT48RXX 、HT46CXX、HT48CXX，MXIC系列的MX10FLCDPC、MX10FMAXPC 、MX10MAXDQC、MX10E8050I等等，為芯片解密行業(yè)的整體發(fā)展以及民族產(chǎn)業(yè)振興、世界電子產(chǎn)業(yè)的快速進(jìn)步作出了突出貢獻(xiàn)。
        有AT91SAM7S128解密需求者請(qǐng)直接與我們聯(lián)系。

　　TheAT91SAM7S128 is a low pincount Flash microcontroller based on the 32-bit ARM7TDMI RISC processor. It features 128K bytes of embedded high-speed Flash with sector lock capabilities and a security bit, and 32K bytes of SRAM. The integrated proprietary SAM-BA Boot Assistant enables in-system programming of the embedded Flash. Its extensive peripheral set includes a USB 2.0 Full Speed Device Port, USARTs, SPI, SSC, TWI and an 8-channel 10-bit ADC. Its Peripheral DMA Controller channels eliminate processor bottlenecks during peripheral-to-memory transfers. Its System Controller manages interrupts, clocks, power, time, debug and reset, significantly reducing the external chip count and minimizing power consumption. In industrial temperature, worse case conditions the maximum clock frequency is 55MHz. Typical core supply is 1.8V, I/Os are supplied at 1.8V or 3.3V and are 5V tolerant. An integrated Voltage Regulator permits single supply at 3.3V. The AT91SAM7S128is supplied in a 64-lead LQFP or QFN Green package. It is supported by an Evaluation Board and extensive application development tools. TheAT91SAM7S128 is a general-purpose microcontroller, providing an ideal migration path for 8-bit applications requiring additional performance, USB connectivity and extended memory.
　　AT91SAM7S128 特性
　　Incorporates the ARM7TDMI? ARM? Thumb? Processor
　　– High-performance 32-bit RISC Architecture
　　– High-density 16-bit Instruction Set
　　– Leader in MIPS/Watt
　　– EmbeddedICE? In-circuit Emulation, Debug Communication Channel Support
　　Internal High-speed Flash
　　– 512 Kbytes (AT91SAM7S512) Organized in Two Contiguous Banks of 1024 Pages
　　of 256 Bytes (Dual Plane)
　　– 256 kbytes(AT91SAM7S256) Organized in 1024 Pages of 256 Bytes (Single Plane)
　　– 128 Kbytes (AT91SAM7S128) Organized in 512 Pages of 256 Bytes (Single Plane)
　　– 64 Kbytes (AT91SAM7S64) Organized in 512 Pages of 128 Bytes (Single Plane)
　　– 32 Kbytes (AT91SAM7S321/32) Organized in 256 Pages of 128 Bytes (Single Plane)
　　– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
　　– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
　　– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
　　– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
　　Flash Security Bit
　　– Fast Flash Programming Interface for High Volume Production
　　Internal High-speed SRAM, Single-cycle Access at Maximum Speed
　　– 64 kbytes (AT91SAM7S512/256)
　　– 32 kbytes (AT91SAM7S128)
　　– 16 kbytes (AT91SAM7S64)
　　– 8 kbytes (AT91SAM7S321/32)
　　Memory Controller (MC)
　　– Embedded Flash Controller, Abort Status and Misalignment Detection
　　Reset Controller (RSTC)
　　– Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector
　　– Provides External Reset Signal Shaping and Reset Source Status
　　Clock Generator (CKGR)
　　– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
　　Power Management Controller (PMC)
　　– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to
　　500 Hz) and Idle Mode
　　– Three Programmable External Clock Signals
　　Advanced Interrupt Controller (AIC)
　　– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
　　– Two (AT91SAM7S512/256/128/64/321) or One (AT91SAM7S32) External Interrupt
　　Source(s) and One Fast Interrupt Source, Spurious Interrupt Protected
　　Debug Unit (DBGU)
　　– 2-wire UART and Support for Debug Communication Channel interrupt,
　　Programmable ICE Access Prevention
　　Periodic Interval Timer (PIT)
　　– 20-bit Programmable Counter plus 12-bit Interval Counter
　　Windowed Watchdog (WDT)
　　– 12-bit key-protected Programmable Counter
　　– Provides Reset or Interrupt Signals to the System
　　– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
　　Real-time Timer (RTT)
　　– 32-bit Free-running Counter with Alarm
　　– Runs Off the Internal RC Oscillator
　　One Parallel Input/Output Controller (PIOA)
　　– Thirty-two (AT91SAM7S512/256/128/64/321) or twenty-one (AT91SAM7S32) Programmable I/O Lines Multiplexed with up
　　to Two Peripheral I/Os
　　– Input Change Interrupt Capability on Each I/O Line
　　– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
　　Eleven (AT91SAM7S512/256/128/64/321) or Nine (AT91SAM7S32) Peripheral DMA Controller (PDC) Channels
　　One USB 2.0 Full Speed (12 Mbits per Second) Device Port (Except for the AT91SAM7S32).
　　– On-chip Transceiver, 328-byte Configurable Integrated FIFOs
　　One Synchronous Serial Controller (SSC)
　　– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
　　– I?S Analog Interface Support, Time Division Multiplex Support
　　– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
　　Two (AT91SAM7S512/256/128/64/321) or One (AT91SAM7S32) Universal Synchronous/Asynchronous Receiver Transmitters
　　(USART)
　　– Individual Baud Rate Generator, IrDA? Infrared Modulation/Demodulation
　　– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
　　– Full Modem Line Support on USART1 (AT91SAM7S512/256/128/64/321)
　　One Master/Slave Serial Peripheral Interface (SPI)
　　– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
　　One Three (AT91SAM7S512/256/128/64/321)-channel or Two (AT91SAM7S32)-channel 16-bit Timer/Counter (TC)
　　– Three (AT91SAM7S512/256/128/64/321) or One (AT91SAM7S32) External Clock Input(s), Two Multi-purpose I/O Pins per
　　Channel
　　– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
　　One Four-channel 16-bit PWM Controller (PWMC)
　　One Two-wire Interface (TWI)
　　– Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
　　One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
　　SAM-BA? Boot Assistant
　　– Default Boot program
　　– Interface with SAM-BA Graphic User Interface
　　IEEE? 1149.1 JTAG Boundary Scan on All Digital Pins
　　5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each
　　Power Supplies
　　– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
　　– 3.3V or 1.8V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
　　– 1.8V VDDCORE Core Power Supply with Brown-out Detector
　　Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions
　　Available in 64-lead LQFP Green or 64-pad QFN Green Package (AT91SAM7S512/256/128/64/321) and 48-lead LQFP Green or
　　48-pad QFN Green Package (AT91SAM7S32)